University of California, Santa Barbara
Department of Electrical and Computer Engineering


VLSI for Computer Engineering

ECE 194BB/594BB Fall 2010

Instructor: Prof. Luke Theogarajan

Schedule: Tuesdays & Thursdays 2:00 - 3:15 p.m., ESB 1003

Final Exam: Wednesday, Dec. 8, 4pm - 7pm, ESB1003


Course Information:

Introduction to the design and implementation of large-scale digital systems using CMOS VLSI: Basics of device and circuit level optimization of digital building blocks;MOS device models including Deep Sub-Micron effects; Circuit design styles for logic, arithmetic, and sequential blocks;Low-power design;Interconnect models and parasitics, device sizing and logical effort, timing issues (clock skew and jitter), and active clock distribution techniques; Memory architectures; technology and scaling; VLSI implementation styles- full custom to standard cell design; design flows and associated EDA tools; design verification; design for fabrication testing; hardware description languages (both analog & digital) (Verilog & AMS); power, area and delay optimizations; clocking schemes; clocked circuits such as domino; power distribution and dissipation; I/O and packaging. Extensive use of CAD tools The class requires the completion of a final project.

Prerequisites:

This is primarily geared for CE students but EE students are also welcome. Must have completed ECE 2ABC.

Syllabus:

Syllabus

Textbook:

Required : CMOS VLSI Design: A Circuits and Systems Perspective (4th Edition) by Neil H. E. Weste and David Harris

    Digital VLSI Chip Design with Cadence and Synopsys CAD tools by Erik Brunvand

TA:

Chin-Hsuan (Jennifer) Chen, chinhsuan_chen@ece.ucsb.edu

Office Hour:

TInstructor: Fridays, 1:00pm - 2:00pm

TA:             Thursdays, 12:00pm - 1:30pm @ ECI


Lectures:

Lecture 0 (pdf) (pptx)

Lecture 1 (pdf) (1-1pptx)    (1-2pptx)

Lecture 3 (pptx)

Lecture 4 (pptx) update

Lecture 5 (pptx)

Lecture 6 (pptx)

Lecture 7 (pptx)   (pptx_update)

Domino Sequencing reference:  Web Enhanced @ www.cmosvlsi.com

Lecture 8 (pptx)

Reference (clock interpolation)

Lecture 9 (pptx)


Lab Tutorial:

Cadence Simulation and Layout Tutorial

Remotely connecting to ECI tips (link to ECI)

reference: Cadence Tutorials



Problem Set:

Problem Set 1   Due: Oct. 5, 2010 at 2:00pm  (in class)    Solution

Problem Set 2   Due: Oct. 14, 2010 at 2:00pm  (in class)  Solution

Problem Set 3    Solution


Midterm Exam:

Midterm   Due: Monday, Nov. 15, 2010 at 3:00pm @ homework box


Design Project:

Design Project 1   Due: Tuesday, Dec. 14, 2010 at 9:00am 

Submit by e-mail (to Professor) or drop off at Professor's office

Report submission:  

Please include the design illustrating the choices of the design, 

overall architecture, schematic, calculations and simulation results. 


Exam Practice:

Midterm Fall2009

Final Fall2009    Solution

Final Practice for time borrowing: 10.5 10.8 10.9 10.10 10.16 10.18 (textbook)    Problems   Solution




ECE Syllabi || Electrical and Computer Engineering || College of Engineering || UCSB Web Site Directory

Last Updated: September 23, 2010