University of California , Santa Barbara
Department of Electrical and Computer Engineering


 

Digital Design Principles

 

ECE 152A- Fall 2009


Prof. Volkan Rodoplu


Lectures: Monday/Wednesday 5.00 - 6.15 pm at TD 2600.

(Note the Location !!!: Theater Dance 2600. This is next to the HumanitiesBuilding.)

Professor's Office hours:  Wed 1:00 - 2:00 PM, Tues 3:00 – 4:00 PM 

Room 4113 Harold Frank Hall  

 


Syllabus

                                  Midterm ExamOctober 28, 2009, 5:00 PM – 6:15 PM, in class (TD2600).


                                 
Final Exam: December 9, 2009 (Wednesday), 7:30 - 10:30 PM, in class (TD2600).



Announcements

12/03/09:  For Lab 5 Demo tomorrow December 4th -  Snehal's section: Snehal will be in the Digilab in between 1:00 - 2:00 pm.If you cannot make it between

1:00 - 2:00 pm, please email her at snehal@umail.ucsb.edu to sort the matter.Also note that, there is a Lab report due for this lab.Please refer to your Lab 5

description for the contents of the report.

 

11/25/09:  EXTENSION: Lab 5 will be due on Friday December 4th instead of Tuesday December  1st.

 

11/23/09:   Prof. Rodoplu’s office hour for tomorrow only (Tuesday, 11/24/09) 3:00-4:00 PM, has been shifted to 3:45 PM – 4:30 PM.

 

11/18/09:   Prof Rodoplu's Office hour will start at 1:30 pm today

 

11/10/09:   HW# 3, Problem 22 of the Course Reader: We will give full credit to the state table. (That is, there is no need to write down the state diagram, but you are welcome to. The state diagram may become too complex, at which point, it ceases to be useful. Hence, writing down the state table is more informative in this case. In particular, if "input don't cares" can be used to make the state table more compact, this is a better representation.)"

 

11/06/09:   Fall 2009 Midterm Solutions posted in Homework Solutions link

 

11/04/09:   Prof. Rodoplu's office hour on Thursday 4-5 PM has been permanently re-scheduled to Tuesday 3-4 PM

 

11/04/09:  Clarifications on Problem 17 of Course Reader: (1) When CLR == 0, LOAD == 0, and COUNT == 0, the counter holds the current count. (2) The input [L_A, L_B] are the external values that are written into the counter during parallel load, which occurs when CLR == 0, and LOAD == 1

 

11/04/09:  Please contact the TA in your lab section if you have questions on the grading of Problem 8 – Homework 1.

 

10/21/09:  Prof. Rodoplu’s office hours for this Thursday (October 22, 4:00 PM) will not be held.

 

10/19/09:  Prof. Rodoplu’s office hours on Wednesdays have been moved from 2:00-3:00 PM to 1:00-2:00 PM.

 

10/19/09:  There will be no pre-lab due for Lab # 3. All of the parts of Lab 3 (i.e. Parts 1, 2, 3, 4, 5) will be due at check-out.

 

10/18/09:  The deadline for HW # 2 has been postponed to 2:00 PM on October 26, 2009, Monday. Problem # 36 from the course reader has been to HW # 2 as the third problem of the homework. 

 

10/08/09 : Note from Disabled Students Program: Notetaker Needed for ECE 152A. $25 per unit (of the class). This will be prorated based on the number of weeks for which the notetaker is hired. Please contact Wanda Thomas: 893-2668. Email:   thomas-w@sa.ucsb.edu . Please apply online at   http://dsp.sa.ucsb.edu/services

 

09/28/09 : Please get the access card from the ECE shop which is the only you can get into the Digital Lab by yourself. Here is what you need to do to get the access card. First get a form from the ECE shop with the signature from the ECE people. Then take that form together with your Photo ID (passport or drive's license) to the Police office in Trailer 600 near the old gym. Finally go back to the ECE shop to have a safety test then enjoy your card.

 

09/28/09 : Please read the UCSB/ECE FPGA Board web page: http://vader.ece.ucsb.edu/digilab-fpga/

09/28/09
: For Lab # 1: Please note that NOT all TTL parts are available. See the hyperlink below on ECE Shop: List of Available Parts (under Lab Handouts). Only these chips are available in the lab, so plan your TTL implementation accordingly.

 

09/28/09 : Please use TTL (7400 series) for your labs (not CMOS 4000 series parts!).

  

09/28/09 : For the lab problem sets, you need to hand in only 1 solution per team (put both team members' names on your solutions.)

 

09/28/09 : Check in the ECE Shop (Room: 1160, Harold Frank Hall; M-F: 8:00-12:00 and 1:00-4:00 ) to get the access cards for the Digital lab.

 

 

Course Reader

(Homework is assigned from the reader.)

CourseReader_Problems 10 to 14

CourseReader Problems 18

CourseReader Problems 19-20

CourseReader Problems 32-33

CourseReader Problem 36

 

 

 


Homework  -  Solutions

The homework is due in the ECE 152AHomework Box on the 3rd floor of Harold Frank Hall.

(After you exit the elevator, go straight through the double doors across from you. The homework box is outside after you go through the double doors.)

HW # 1

 (due October 16, 2009; 2:00 PM)

For HW # 1, PLEASE SKIP PROBLEM # 6.

DO THE REST OF THE PROBLEMS.

 

HW # 2

(due October 26, 2009; 2:00 PM)

For HW # 2: PLEASE SKIP PROBLEM 9. (This is Problem # 16 in Course Reader).

DO THE REST OF THE PROBLEMS.

 

HW # 3

(due November 20, 2009; 2:00 PM)

For HW # 3: PLEASE SKIP PROBLEMS 1-3 (the B&V textbook problems). Do the REST of the Problems, which are from the Course Reader.

(Start early!)

 

HW # 4

 

(due November 30, 2009; 2:00 PM)

HW # 5

 

  (due December 4, 2009; 2:00 PM)

Grading Guidelines for Homeworks and Labs

 

 



Lab Handouts

Lab Schedule

Print out Data Sheets for each lab

ECE Shop: List of Available Parts

UCSB/ECE DigiLab FPGA Board Information

ALL PRE-LABS DUE ARE AT THE BEGINNING OF YOUR LAB.

THE CHECK-OUTS FOR DEMOS MUST BE DONE WITHIN FIRST 1 HR. OF THE LAB SECTION.

All the lab dates below are for "week of" the date indicated,

at the beginning of your lab section.

Lab #1

Nothing is due: October 6, 2009 (but highly encouraged to complete as much of Steps # 1 and # 2 as possible.)

Pre-lab due: (Steps # 1 and # 2 due) October 13, 2009.   [Demo of Steps # 3 and/or # 4 encouraged, but not required.]

Check-out (Steps # 3 and # 4): October 20, 2009

Lab #2

Pre-lab due: October 20, 2009   [This is a long pre-lab; start early!]

Check-out: October 27, 2009

Lab #3

Lab starts: October 27, 2009

Check-out: November 3, 2009

(Hint: Use teamwork to manage the wiring to get it done by the deadline.)

Lab # 4 Lab-4 help Sample C program cbw.h cbw32bc.lib lab4_verilog Sample-Testbench cbw32.dll

Lab starts: November 3, 2009

(There is no pre-lab for this lab.)

Part 1 due: November 10, 2009

Parts 2, 3 and 4 due: November 17, 2009

Lab #5 template.v

Lab starts: November 17, 2009

(There is no pre-lab for this lab.)

Parts 1 and 2 due: November 24, 2009

Parts 3 and 4 due: December 1 , 2009- Extended to

Friday December 4 2009

(Note: for those whose lab sections are on Thursday, Parts 1 and Parts are due on Wednesday in the class)

 

 


Lab Sections and TA Office Hours
Harold Frank Hall, Room 1124 (DigiLab)

You may  go to the office hours of any TA (not just the TA of your lab section)

NikSumikawa

nsumikawa@gmail.com

 

Lab Section :  Tue 7:00-9:50 PM

 

Office hours :  Tuesday 11:00AM-12:30PM

Snehal Vadvalkar

snehal@umail.ucsb.edu

 

Lab Section:  Tue 2:00-4:50 PM

 

Office hours:  Thursday: 10:00-11:30 AM

 

Acknowledgments: We would like to thank all the professors, TA's and lecturers, who have created, worked on, used, and revised the laboratories for this course. A partial list is as follows: Prof. Roger C. Wood, Christian Schmidt, Prof. Kaustav Banerjee, James Rosenthal, Brian Simolon, Dr. John M. Johnson, Prof. Volkan Rodoplu, Aida Todri, Nilesh Modi, Vishal Mehta, James Tandon. We would also like to thank Dr. John M. Johnson for preparing lecture note slides for this course, and for his continuing contributions during the summer quarters.


Practice Exams

ECE 152A Midterm Exam Fall 2004

ECE152A_Midterm Exam Winter 2005

ECE 152A Midterm Exam Fall 2005

ECE 152A Midterm Exam Winter 2007

ECE 152A Midterm Exam Fall 2007

ECE 152A Midterm Exam Winter 2008

ECE 152A Midterm Exam Summer 2008

ECE 152A Midterm Exam Winter 2009

ECE 152A Final Exam Fall 2004

ECE 152A Final Exam Winter 2005

Practice Problems for FSM Design: PS1 PS2 PS4


Lecture Notes (very rough)

(The following are handwritten lecture notes that I made while preparing for the lectures. These are very rough compared to the exposition in class, and were mostly notes to myself. However, I am providing them here in case you find them useful.)

Lecture 0

. Lecture 1

. Lecture 2

. Lecture 3

. Lecture 4

. Lectures 5-6

.         Lecture 5-6 Addendum

. Lecture 7

. Lecture 8-9

.         FSM Examples

.         Mealy/Moore Examples

.         Blocking vs. Non-blocking Assignments

. Lecture 11

.         Timing_Supplement1

.         Timing_Supplement2

. Lecture 13

.         CMOS Lecture Slides

. Lecture 14

Lecture 14.2 (Adders # 2)

. Final Exam Review Lecture

. (Enrichment (not required): Lecture 10)

 

Lecture Slides (prepared by Prof. Johnson)

Lecture 1

Lecture 2

Lecture 3

[Lecture 14]

Lecture 4

(Lecture 4 Supplement)

Lecture 5

Lecture 6

Lecture 7

Lecture 8

Lecture 9

Lecture 10

Lecture 11

Lecture 12

Lecture 13

Lecture 15